EPIC meeting on PIC testing

16-17 February 2017

Pisa, Italy

Hosted by


Sponsored by


The need to improve, speed up, and reduce cost of assembly of photonics integrated circuits is in constant debate, but as production numbers increase,  testing is becoming more and more important. Testing is performed at wafer level, on singulated chips, as well as on fully assembled device, and requires the combination of more conventional electrical probing and optical measurements, either with probing fibres or by means of near field / far field beam analysers.

Primary scope of the event is to discuss and list requirements, differentiating also where, how, and what has to be tested in the whole PICs manufacturing chain. At wafer level another important differentiation is given by the coupling methods.

Like packaging, testing starts at design level and ends with automated test machines. The discussion will range from probing techniques to handling and test procedures and also touch briefly on the needs and requirements for dedicated modular instrumentation.

Preliminary programme

Thursday 16 February

9.30 Depart from NH hotel Pisa (Piazza Stazione 2) – Meeting point: Lobby
10.00-12.30 INPHOTEC visit labs (optional)

12:30-14.00 Lunch

14:00-14:30 Registration and coffee
14:30 Welcome by Prof. Pratti (Director INPHOTEC)
14:45 Setting the scene
14:45 Lee Carroll (PIXAPP Pilot line)
15:00 KEYNOTE PRESENTATION: Ignazio Piacentini (ficonTEC) (30min + discussion) “An overview of optical / electrical testing requirements for PICs at packaged devices, singulated chips, and full wafer level and the need for high volume test & measurement automation”
15:30 KEYNOTE PRESENTATION: Stefan Richter (Zeiss) (30min + discussion) “: “Testing of Photonic Integrated Circuits – A View from an Outside Perspective””

16:00 Networking Break

16:50 KEYNOTE PRESENTATION: Andrea Melloni: “Advanced Techniques for Wafer and die testing”
17:20 Norbert Grote (HHI): “Testing of generic PICs – what and how?”
17:40 Martin Zoldak (Argotech): “Micro module wafer level testing”
18:00 End of 1st day and bus transfer to the Leaning tower of Pisa
19:00 Walk around Piazza dei Miracoli/Piazza del Duomo (Leaning tower of Pisa), followed by dinner
19:30-21:30 Dinner at Ristorante Pizzeria Duomo
21:30 Bus transfer to NH hotel Pisa

Friday 17 February

8.30 Depart from NH hotel Pisa (Piazza Stazione 2) – Meeting point: Lobby
09:00 Welcome coffee

09:30 Recap of first day by Jose Pozo
09:40 Milan Milosevic (Southampton) “Wafer scale testing of photonic circuits via ion implantation in silicon”
10:00 Lars Zimmerman (IHP) “Wafer-level characterization in an electronic-photonic technology”
10.20 Erik den Haan Smart Photonics “Wafer-level characterization of InP PICs”
10.40 Dylan Burke (Yelo): “Burn-in and life-test of optical devices”

11.00 Networking break

11.40 Moreno Lupi (Microtest) “Design and manufacturing of automated testing equipment”
12:00 Antonello Vanucci (Linkra): “Die-level and packaged device level testing”
12:20 Rocio Baños (VLC): “Challenges in PIC characterization”
12:40 Sylwester Latkowski (TU/e): “Generic test and packaging”

13:00 Lunch

14:00 Panel discussion and action points definition
14:45 End of the meeting
14:45 INPHOTEC visit labs (optional)


Via G. Moruzzi, 1
56124 Pisa

  • EPIC members and invited companies: 200 EUR (excluding VAT)

Please note this event is on INVITATION ONLY. If you would like to attend, please contact Carmen Ferrari, Events and Marketing Manager at EPIC

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